ADC1613D065HN-C18 vs ADC1610S125HN-C1 Comparaison
Comparaison détaillée côte à côte de ADC1613D065HN-C18 par Renesas Electronics et ADC1610S125HN-C1 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Renesas Electronics
ADC1613D065HN-C18 - 16-bit 65MSPS Dual ADC w/ JESD204A | Renesas
ADC1613D065HN-C18 ✓ ActifRenesas Electronics
ADC1610S125HN-C1 - 16-Bit 125MSPS Pipelined ADC | Renesas
ADC1610S125HN-C1 ✓ ActifComparaison des spécifications
| Paramètre | ADC1613D065HN-C18 | ADC1610S125HN-C1 |
|---|---|---|
| Marque | Renesas Electronics | Renesas Electronics |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $21,50 | $18,95 |
| Résolution | 16 bit | 16 bit |
| Number of Channels | 2 (Dual) | 1 |
| Sampling Rate (Per Channel) | 65 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Data Interface | Serial JESD204A | — |
| Input Type | [DATA_NEEDED: differential/single-ended] | Single-ended analog input |
| Analog Supply Voltage | 1.8 V | — |
| Digital Supply Voltage | 1.8 V / 3.3 V | — |
| Boîtier | 56-pin HVQFN Exposed Pad (56-VFQFPN) | 40-VFQFPN (HVQFN) 6 mm x 6 mm with exposed pad |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: temperature range] | -40 C to +85 C (industrial) |
| SNR | [DATA_NEEDED: SNR dBFS] | — |
| SFDR | [DATA_NEEDED: SFDR dBc] | — |
| Power Dissipation | [DATA_NEEDED: power per channel mW] | — |
| Statut RoHS | Compliant | Compliant |
| Packaging | Tray | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Sample Rate (max) | — | 125 MSPS |
| Sample Rate Family | — | 65 / 80 / 105 / 125 MSPS |
| Digital Output Interface | — | CMOS parallel or LVDS DDR |
| Package Outline | — | MO-220 / SOT618-1 |
| Package Height | — | 0.85 mm |
| Screening Level | — | Industrial |
| Internal Reference | — | Yes, programmable via SPI or VREF/SENSE pins (0 dB to 6 dB, 1 dB steps) |
| Reference Programming | — | INTREF[2:0] bits, INTREF_EN control bit |
| Lead Free | — | Yes |
| Nombre de broches | — | 40 |