AT25DF641A-SH-T vs AT25DF081A-SH-B Comparaison
Comparaison détaillée côte à côte de AT25DF641A-SH-T par Renesas Electronics et AT25DF081A-SH-B par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Renesas Electronics
AT25DF641A-SH-T - 64Mbit SPI/Quad SPI NOR Flash, SOIC-8 | Renesas
AT25DF641A-SH-T NrndComparaison des spécifications
| Paramètre | AT25DF641A-SH-T | AT25DF081A-SH-B |
|---|---|---|
| Marque | Renesas Electronics | Renesas Electronics |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | NRND | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,82 | $0,58 |
| Type de mémoire | NOR Flash | Serial NOR Flash |
| Density | 64 Mbit (8 MB) | — |
| Interface | SPI (Single/Dual I/O), Serial Peripheral Interface compatible | SPI (Single/Dual), Mode 0 and Mode 3 |
| Clock Frequency (max) | 100 MHz (Single-I/O) | — |
| Supply Voltage (VCC) | 2.7 V to 3.6 V (single supply) | 2.7 V to 3.6 V |
| Température de fonctionnement | -40 C to +85 C (industrial) | -40C to +85C |
| Boîtier | 8-SOIC (SOIC-W 208 mil, "SH") | 8-SOIC (SOIC-W, 208 mil) |
| Type de montage | Surface Mount | — |
| Page Size (program) | 256 bytes | — |
| Sector Erase Sizes | 4 KB / 32 KB / 64 KB uniform | — |
| Sector Architecture | Uniform 4 KB sectors | — |
| Deep Power-Down Current | [DATA_NEEDED: typical deep power-down current in uA] | — |
| Active Read Current | [DATA_NEEDED: active read current in mA] | — |
| Program/Erase Endurance | [DATA_NEEDED: endurance cycles] | — |
| Data Retention | [DATA_NEEDED: data retention years] | >20 years |
| Write-Protect Pin | Yes (/WP) | — |
| Hold Pin | Yes (/HOLD) | — |
| JEDEC ID Read | Yes | — |
| Niveau MSL | 3 (per JEDEC J-STD-020, typical for SOIC flash) | — |
| Statut RoHS | Compliant (Green) | Compliant |
| Lead-Free | Yes | — |
| Statut du cycle de vie | Not Recommended for New Designs (NRND), see AT25QF641B-SHB-T | — |
| Packaging | Tape & Reel (suffix -T) | — |
| Memory Density | — | 8 Mbit (1 Mbyte) |
| Memory Organization | — | 4K x 256 bytes |
| Fréquence d'horloge maximale | — | 100 MHz |
| Sector / Block Erase Sizes | — | 4 KB / 32 KB / 64 KB uniform |
| Page Program Size | — | 1 to 256 bytes |
| Endurance | — | 100,000 erase/program cycles per sector |
| Security Registers | — | Three 256-byte Security Register pages |
| SFDP Support | — | Yes (JEDEC 216 standard) |
| Write Protection | — | Hardware WP pin plus BP0-BP2 status-register bits |