ATMEGA128L-8MN vs ATMEGA128L-8MUR Comparaison
Comparaison détaillée côte à côte de ATMEGA128L-8MN par Microchip Technology et ATMEGA128L-8MUR par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
ATMEGA128L-8MN - 8MHz AVR MCU 128KB Flash 64-QFN | Microchip
ATMEGA128L-8MN ✓ ActifMicrochip Technology
ATMEGA128L-8MUR - 8-bit AVR MCU 128KB 8MHz 64-QFN | Microchip
ATMEGA128L-8MUR ✓ ActifComparaison des spécifications
| Paramètre | ATMEGA128L-8MN | ATMEGA128L-8MUR |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,68 | $11,75 |
| Core Architecture | 8-bit AVR RISC | — |
| Program Memory Size | 128 KB (64K x 16) Flash | — |
| SRAM Size | 4 KB (4K x 8) | — |
| EEPROM Size | 4 KB | — |
| Maximum Clock Speed | 8 MHz | — |
| Supply Voltage Range | 2.7 V to 5.5 V | 2.7 V to 5.5 V |
| I/O Count | 53 programmable I/O lines | — |
| ADC | 8-channel, 10-bit | — |
| JTAG Interface | Yes (on-chip debug and boundary-scan) | — |
| Timers | 2 x 8-bit, 2 x 16-bit with PWM | Two 8-bit, Two 16-bit |
| Communication Interfaces | 2 x USART, SPI, 2-wire (I2C-compatible) | 2x USART, SPI, TWI (I2C) |
| Instruction Set | 133 instructions, most single-cycle | — |
| Boîtier | 64-QFN (9x9 mm) | 64-VFQFN Exposed Pad (MLF), 9x9 mm |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Statut du cycle de vie | Active | — |
| Series | AVR ATmega | — |
| Core Processor | — | AVR 8-bit RISC |
| Core Size | — | 8-Bit |
| Speed (Max Clock) | — | 8 MHz |
| Flash Memory | — | 128KB (64K x 16) In-System Programmable |
| SRAM | — | 4KB |
| EEPROM | — | 4KB |
| Number of I/O | — | 53 |
| ADC Resolution | — | 10-bit, 8 channels |
| Debug Interface | — | JTAG (on-chip debug, boundary scan) |
| Programmability | — | In-System Programmable (ISP), boot loader self-programming |
| Lifecycle Stage | — | ACTIVE |
| Statut RoHS | — | [DATA_NEEDED: RoHS status] |