ATMEGA169P-16MU vs ATMEGA165P-16MN Comparaison
Comparaison détaillée côte à côte de ATMEGA169P-16MU par Microchip Technology et ATMEGA165P-16MN par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
ATMEGA169P-16MU - AVR 8-bit MCU 16KB 16MHz 64-QFN | Microchip
ATMEGA169P-16MU ✓ ActifMicrochip Technology
ATMEGA165P-16MN - 8-Bit AVR MCU 16KB 16MHz 64-QFN | Microchip
ATMEGA165P-16MN ✓ ActifComparaison des spécifications
| Paramètre | ATMEGA169P-16MU | ATMEGA165P-16MN |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2,64 | $1,42 |
| Core Architecture | AVR enhanced RISC, 8-bit | AVR 8-bit RISC |
| Flash Program Memory | 16 KB (8K x 16), self-programmable | — |
| SRAM | 1 KB | 1 KB |
| EEPROM | 512 B | 512 B |
| Fréquence d'horloge maximale | 16 MHz | — |
| Throughput | 16 MIPS at 16 MHz (1 MIPS per MHz) | 16 MIPS at 16 MHz |
| Supply Voltage Range | 2.7 V to 5.5 V | [DATA_NEEDED: Supply Voltage Range] |
| ADC | 8-channel, 10-bit | — |
| LCD Controller | Yes, segment LCD driver | — |
| Debug Interface | JTAG (on-chip debug and boundary scan) | — |
| I/O Ports | 53 I/O lines | — |
| Instructions | 133 instructions, most single-cycle | 131 (mostly single-cycle) |
| Boîtier | 64-QFN (MLF), 9x9 mm | 64-QFN (9x9 mm) with exposed pad (HVQCCN) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | Industrial grade |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS Status] |
| Programming Interface | ISP via SPI; self-programming Flash | — |
| Core Size | — | 8-bit |
| Max Clock Frequency | — | 16 MHz |
| Flash Memory | — | 16 KB (8K x 16) ISP |
| General Purpose I/O | — | 53 lines |
| Working Registers | — | 32 |
| JTAG | — | Yes (IEEE 1149.1 boundary scan + on-chip debug) |
| Number of Terminals | — | 64 |
| Watchdog Timer | — | Yes, with separate on-chip oscillator |