ATSAMA5D35A-CN vs ATSAMA5D28B-CUR Comparaison
Comparaison détaillée côte à côte de ATSAMA5D35A-CN par Microchip Technology et ATSAMA5D28B-CUR par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
ATSAMA5D35A-CN - 536MHz Cortex-A5 MPU, 324-LFBGA | Microchip
ATSAMA5D35A-CN ✓ ActifMicrochip Technology
ATSAMA5D28B-CUR - 500MHz Cortex-A5 MPU 289-LFBGA | Microchip
ATSAMA5D28B-CUR ✓ ActifComparaison des spécifications
| Paramètre | ATSAMA5D35A-CN | ATSAMA5D28B-CUR |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,20 | $12,60 |
| Manufacturer | Microchip Technology | — |
| Series | SAMA5D3 | — |
| Core Processor | ARM Cortex-A5 | — |
| Number of Cores / Bus Width | 1 Core / 32-Bit | — |
| Maximum CPU Clock | 536 MHz | 500 MHz |
| Instruction Cache | 32 KB | — |
| Data Cache | 32 KB | — |
| Internal SRAM | 128 KB | — |
| Internal ROM | 160 KB | — |
| Floating Point Unit | Yes (VFPv4 + NEON) | — |
| Boîtier | 324-LFBGA (15x15 mm) | 289-LFBGA (14x14 mm) |
| Memory Controller | 16-bit DDR2 / LPDDR / LPDDR2 | — |
| LCD Controller | Up to WXGA (1280x768), 24-bit | — |
| Ethernet | 2x 10/100 MAC with IEEE 1588 | 10/100 Mbps (1x) |
| USB | 2x USB 2.0 High-Speed (Host + Device) | USB 2.0 + HSIC |
| Hardware Crypto Accelerator | AES, 3DES, SHA, TRNG | — |
| ADC | 12-bit, up to 12 channels | — |
| UART / SPI / I2C | Up to 6 / 4 / 3 | — |
| Température de fonctionnement | -40C to +85C (Extended Industrial) | -40C to +85C (Industrial) |
| Tension d'alimentation | 1.08 V core, 3.3 V I/O | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Niveau MSL | 3 (168 hours) | — |
| Statut RoHS | Compliant | Compliant |
| Lead-Free / Halogen-Free | Yes / [DATA_NEEDED: halogen-free status] | — |
| Core Architecture | — | ARM Cortex-A5 (ARMv7-A) |
| Number of Cores | — | 1 |
| L1 Instruction Cache | — | 32 kbyte |
| L1 Data Cache | — | 32 kbyte |
| L2 Cache / SRAM | — | 128 kbyte (configurable) |
| Memory Management Unit | — | Yes (full MMU) |
| NEON Media Engine | — | Yes (SIMD) |
| Arm TrustZone | — | Yes |
| DRAM Controller | — | LPDDR1/2/3, DDR2/3/3L, 16-bit, with ECC |
| External Bus | — | QSPI |
| Supply Voltage I/O | — | 3.3 V |