CD4026BF vs CD4033BE Comparaison
Comparaison détaillée côte à côte de CD4026BF par Harris Corporation et CD4033BE par Texas Instruments. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | CD4026BF | CD4033BE |
|---|---|---|
| Marque | Harris Corporation | Texas Instruments |
| Catégorie | Logic ICs | Logic ICs |
| Statut du cycle de vie | Unknown | Actif |
| Counter Type | Decade counter with 7-segment decoder | — |
| Number of Counter Elements | 1 element | — |
| Output Organization | 5 bit | — |
| Clock Edge | Positive edge | Positive edge |
| Supply Voltage Range | 3 V to 18 V | [DATA_NEEDED: supply voltage range] |
| Fréquence d'horloge maximale | 16 MHz | [DATA_NEEDED: maximum clock frequency at rated supply voltage] |
| Counter Architecture | 5-stage Johnson counter with decoded 7-segment output | — |
| Package Type | 16-CDIP | — |
| Total Pin Count | 16 pins | — |
| Type de montage | Through-hole | Through-hole |
| Logic Family | CD4000 CMOS series | CMOS |
| Technology | CMOS | — |
| Display Output | Decoded 7-segment output for one numerical display | Decoded 7-segment output for one numerical display stage |
| Carry Function | Carry-in and carry-out decimal chaining | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Maximum Input Voltage | [DATA_NEEDED: maximum input voltage] | — |
| Courant de repos | [DATA_NEEDED: quiescent current] | [DATA_NEEDED: quiescent current] |
| Absolute Maximum Ratings | [DATA_NEEDED: absolute maximum ratings] | — |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | unknown | — |
| Product Type | — | CMOS decade counter/divider with decoded 7-segment display outputs |
| Manufacturer | — | Texas Instruments |
| Counter Configuration | — | 1 decade counter element |
| Counter State Width | — | 5 bit |
| Fully Static Counter Frequency | — | DC to 6 MHz typical at VPP = 10 V |
| Internal Counter Architecture | — | 5-stage Johnson decade counter |
| Display Enable | — | Display-enable output |
| Ripple Blanking | — | Supported |
| Lamp Test | — | Supported |
| Boîtier | — | 16-PDIP |
| Output Drive Current | — | [DATA_NEEDED: segment output drive current] |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |