CDK2308AILP64 vs CDK2308DILP64 Comparaison
Comparaison détaillée côte à côte de CDK2308AILP64 par MaxLinear et CDK2308DILP64 par MaxLinear. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | CDK2308AILP64 | CDK2308DILP64 |
|---|---|---|
| Marque | MaxLinear | MaxLinear |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,20 | $9,85 |
| Manufacturer | Exar (MaxLinear) | — |
| Part Number | CDK2308AILP64 | — |
| Résolution | 10 bit | 10 bit |
| Number of Channels | 2 (Dual) | 2 (Dual) |
| Sampling Rate (Grade ILP64) | 20 MSPS | — |
| Family Maximum Sampling Rate | 80 MSPS (per family datasheet) | — |
| Architecture | Pipelined | Pipelined ADC |
| Input Type | Differential / Single-ended analog | Single-ended analog |
| Analog Supply Voltage | +3.3 V | — |
| Digital Supply Voltage | +3.3 V | — |
| Data Interface | Parallel CMOS / TTL | — |
| Boîtier | 64-pin QFN (LP) 9x9 mm with exposed pad | 64-QFN (9x9 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | -40C to +85C (industrial) | -40 C to +85 C |
| Internal Reference | Yes (bandgap) | — |
| Input Bandwidth | [DATA_NEEDED: input bandwidth MHz] | [DATA_NEEDED: -3 dB input bandwidth] |
| INL (Integral Non-Linearity) | [DATA_NEEDED: INL in LSB] | — |
| DNL (Differential Non-Linearity) | [DATA_NEEDED: DNL in LSB] | — |
| SNR | [DATA_NEEDED: SNR dBFS] | [DATA_NEEDED: SNR at full scale] |
| Power Dissipation | [DATA_NEEDED: power in mW] | 78 mW per channel at 80 MSPS |
| Statut RoHS | Compliant (per distributor listings) | Compliant |
| Sampling Rate (max) | — | 80 MSPS |
| Supported Sample Rates | — | 20 / 40 / 65 / 80 MSPS (programmable) |
| Supply Voltage (AVDD) | — | [DATA_NEEDED: AVDD nominal voltage] |
| Supply Voltage (DRVDD) | — | [DATA_NEEDED: DRVDD nominal voltage] |
| SFDR | — | [DATA_NEEDED: SFDR] |
| ENOB | — | [DATA_NEEDED: effective number of bits] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Power-Down Modes | — | Per-channel standby, chip standby, full power-down |
| Track-and-Hold Amplifier | — | Integrated, optimized for IF frequencies |