CDK2308BILP64 vs CDK2308AILP64 Comparaison
Comparaison détaillée côte à côte de CDK2308BILP64 par MaxLinear et CDK2308AILP64 par MaxLinear. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | CDK2308BILP64 | CDK2308AILP64 |
|---|---|---|
| Marque | MaxLinear | MaxLinear |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,25 | $7,20 |
| Résolution | 10 bit | 10 bit |
| Number of Channels | 2 (dual) | 2 (Dual) |
| Sample Rate (B grade) | 40 MSPS per channel | — |
| Family Speed Grades | 20 / 40 / 65 / 80 MSPS (A/B/C/D grades) | — |
| Architecture | Pipelined with on-chip track-and-hold | Pipelined |
| Input Bandwidth | Up to 100 MHz IF (full-power) | [DATA_NEEDED: input bandwidth MHz] |
| Input Type | Differential analog input | Differential / Single-ended analog |
| Tension d'alimentation | 3.3 V (analog and digital) | — |
| Power Consumption | [DATA_NEEDED: total power at 40 MSPS] | — |
| Power-Down Modes | Per-channel, standby, full power-down | — |
| Output Interface | Parallel CMOS | — |
| Boîtier | 64-pin QFN (LP), 9x9 mm with exposed pad | 64-pin QFN (LP) 9x9 mm with exposed pad |
| Plage de température de fonctionnement | [DATA_NEEDED: industrial / extended range] | -40C to +85C (industrial) |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | Compliant | Compliant (per distributor listings) |
| Lead-Free | Yes | — |
| Datasheet Document | Cadeka / Exar CDK2308 family datasheet (15 pages) | — |
| Manufacturer | — | Exar (MaxLinear) |
| Part Number | — | CDK2308AILP64 |
| Sampling Rate (Grade ILP64) | — | 20 MSPS |
| Family Maximum Sampling Rate | — | 80 MSPS (per family datasheet) |
| Analog Supply Voltage | — | +3.3 V |
| Digital Supply Voltage | — | +3.3 V |
| Data Interface | — | Parallel CMOS / TTL |
| Internal Reference | — | Yes (bandgap) |
| INL (Integral Non-Linearity) | — | [DATA_NEEDED: INL in LSB] |
| DNL (Differential Non-Linearity) | — | [DATA_NEEDED: DNL in LSB] |
| SNR | — | [DATA_NEEDED: SNR dBFS] |
| Power Dissipation | — | [DATA_NEEDED: power in mW] |