CDK8307AILP64 vs CDK8307DILP64 Comparaison
Comparaison détaillée côte à côte de CDK8307AILP64 par MaxLinear et CDK8307DILP64 par MaxLinear. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
MaxLinear
CDK8307AILP64 - 12/13-bit Octal Ultra-Low Power LVDS ADC | MaxLinear
CDK8307AILP64 ✓ ActifMaxLinear
CDK8307DILP64 - 12/13-bit 65MSPS Octal ADC, LVDS, 64-QFN | MaxLinear
CDK8307DILP64 ✓ ActifComparaison des spécifications
| Paramètre | CDK8307AILP64 | CDK8307DILP64 |
|---|---|---|
| Marque | MaxLinear | MaxLinear |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,45 | $13,95 |
| Résolution | 12/13-bit (selectable) | 12/13-bit |
| Number of Channels | 8 (simultaneous sampling) | 8 |
| Sample Rate Range | 20 / 40 / 50 / 65 / 80 MSPS | — |
| Architecture | Pipelined ADC with proprietary core | Proprietary pipelined |
| Output Interface | Serial LVDS | Serial LVDS |
| Reference | Internal reference (integrated) | Internal |
| Tension d'alimentation | [DATA_NEEDED: supply voltage] | — |
| Power Dissipation (Typ) | Ultra-low power (per-channel shutdown) | — |
| Shutdown Modes | Per-channel + full-chip idle (via external pin) | — |
| Control Interface | Serial programming interface (SPI-style) | Serial (SPI-compatible) |
| FPGA Compatibility | Designed to interface with major FPGA vendors | — |
| Boîtier | 64-pin QFN (ILP64) | 64-pin QFN (9x9 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | [DATA_NEEDED: temperature range] | [DATA_NEEDED: industrial/commercial temperature grade] |
| Statut RoHS | Compliant | Compliant |
| Original Brand | Cadeka / Exar (now MaxLinear) | — |
| Sample Rate (max) | — | 65 MSPS |
| Sample Rate Options | — | 20 / 40 / 50 / 65 MSPS |
| Input Type | — | Single-ended analog input |
| Analog Supply Voltage | — | 1.8 V |
| Digital Supply Voltage (OVDD) | — | 1.7 V to 3.6 V |
| Power Consumption | — | [DATA_NEEDED: mW per channel at 65 MSPS, total ~45 mW quoted by Mouser snippet but per-channel figure not in supplied data] |
| Niveau MSL | — | [DATA_NEEDED] |