EP1C20F400C6 vs EP1C4F400C7 Comparaison
Comparaison détaillée côte à côte de EP1C20F400C6 par Altera et EP1C4F400C7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1C20F400C6 | EP1C4F400C7 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,95 | $18,75 |
| Series | Cyclone | — |
| Logic Elements | 20,060 | — |
| Logic Array Blocks | 2,006 | — |
| Embedded RAM Bits | 294,912 bits (128 x 36-bit M4K blocks x 64) | — |
| Total RAM Blocks | 64 M4K blocks | — |
| Maximum User I/O | 301 | — |
| PLLs | 1 | 2 |
| Boîtier | 400-ball FineLine BGA (FBGA) | 400-ball FBGA |
| Core Voltage (VCCINT) | 1.5 V | — |
| Process Technology | 0.13 µm SRAM | 130 nm CMOS |
| Température de fonctionnement | 0 °C to +85 °C (Commercial, C6 speed grade) | — |
| Speed Grade | 6 (commercial) | C7 (commercial, -7) |
| Configuration Modes | Passive Serial, Active Serial, JTAG | — |
| Type de montage | Surface Mount (BGA) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status of EP1C20F400C6 - pre-RoHS Altera parts typically non-compliant; needs explicit verification] | [DATA_NEEDED: per lot] |
| LVDS Data Rate | Up to 311 Mbps | — |
| Design Software | Altera Quartus II / Intel Quartus Prime | — |
| Device Family | — | Cyclone (Cyclone I) |
| Logic Elements (LEs) | — | 4,000 |
| Logic Array Blocks (LABs) | — | 400 |
| Total RAM Bits | — | 78,336 |
| User I/Os | — | 301 |
| Core Supply Voltage (VCCINT) | — | 1.425 V to 1.575 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: per-bank voltage range] |
| Température de jonction en fonctionnement | — | 0°C to 85°C |
| Embedded Multipliers (18x18) | — | [DATA_NEEDED: multiplier count] |
| LVDS Support | — | Up to 640 Mbps |
| Global Clock Network | — | Up to 8 dedicated clock pins |
| Configuration | — | Active serial / Passive serial / JTAG |