EP1C20F400C7N vs EP1C20F400I-6 Comparaison
Comparaison détaillée côte à côte de EP1C20F400C7N par Altera et EP1C20F400I-6 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1C20F400C7N | EP1C20F400I-6 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Fin de vie |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $65,80 | $27,85 |
| Series | Cyclone | — |
| Family | Cyclone I | Cyclone (first generation) |
| Logic Elements (LE) | 20,060 | — |
| Logic Array Blocks (LABs) | 2,006 | — |
| Embedded Memory (bits) | 294,912 (288 Kbits, M4K blocks) | — |
| User I/O Count | 301 | — |
| Embedded 18x18 Multipliers | 52 | 244 |
| PLLs | 4 | — |
| Process Technology | 130 nm CMOS (SRAM-based) | 0.13 um SRAM |
| Core Voltage | 1.5 V | — |
| Speed Grade | -7 (commercial, ~405 MHz internal) | -6 (slowest of Cyclone family) |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | — |
| Boîtier | 400-ball FineLine BGA (FBGA) | 400-ball FineLine BGA (FBGA-400) |
| Type de montage | Surface Mount | — |
| Configuration Interface | Active Serial (AS) / Passive Serial (PS) / JTAG | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (via 8 I/O banks) | — |
| External Memory Support | DDR SDRAM, QDR SRAM, FCRAM | — |
| Statut RoHS | Compliant (per Altera product page) | Compliant (per distributor listings) |
| Logic Elements | — | 20,060 |
| Embedded Memory (M4K blocks) | — | 294,912 bits (72 M4K blocks) |
| Maximum User I/O Pins | — | 301 |
| Phase-Locked Loops (PLLs) | — | 4 |
| Temperature Grade | — | Industrial (-40C to +85C) |
| Pitch | — | 1.0 mm |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage (VCCIO) | — | Multiple banks, 1.5V to 3.3V |
| Configuration Modes | — | Passive Serial (PS), Active Serial (AS), JTAG |
| Supported I/O Standards | — | LVTTL, LVCMOS, SSTL, LVDS, PCI |
| Statut du cycle de vie | — | End-of-Life (Cyclone family discontinued) |