EP1C4F400C7 vs EP1C4F400I7 Comparaison
Comparaison détaillée côte à côte de EP1C4F400C7 par Altera et EP1C4F400I7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1C4F400C7 | EP1C4F400I7 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,75 | $0,00 |
| Device Family | Cyclone (Cyclone I) | — |
| Logic Elements (LEs) | 4,000 | — |
| Logic Array Blocks (LABs) | 400 | — |
| Total RAM Bits | 78,336 | 78336 |
| User I/Os | 301 | — |
| Boîtier | 400-ball FBGA | — |
| Process Technology | 130 nm CMOS | CMOS 130 nm |
| Core Supply Voltage (VCCINT) | 1.425 V to 1.575 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: per-bank voltage range] | — |
| Température de jonction en fonctionnement | 0°C to 85°C | — |
| Speed Grade | C7 (commercial, -7) | -7 |
| PLLs | 2 | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: multiplier count] | — |
| LVDS Support | Up to 640 Mbps | — |
| Global Clock Network | Up to 8 dedicated clock pins | — |
| Configuration | Active serial / Passive serial / JTAG | — |
| Statut RoHS | [DATA_NEEDED: per lot] | [DATA_NEEDED: RoHS status for EP1C4F400I7] |
| Product Type | — | FPGA - Field Programmable Gate Array |
| Series | — | Cyclone |
| Number of Logic Cells / Elements | — | 4000 |
| Number of LABs | — | 400 |
| Number of User I/Os | — | 301 |
| Core Supply Voltage | — | 1.5 V |
| Maximum Internal Frequency | — | 320 MHz (family level) |
| Boîtier / Format | — | 400-BGA (FBGA/PBGA), 21 x 21 mm, 1.0 mm pitch |
| Number of Terminals | — | 400 |
| Style de montage | — | Surface Mount (BGA) |
| Temperature Grade | — | Industrial (I7 suffix) |
| Plage de température de fonctionnement | — | [DATA_NEEDED: exact industrial temperature range] |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |