EP1K10TC100-1 vs EP1K10TC100-1N Comparaison
Comparaison détaillée côte à côte de EP1K10TC100-1 par Altera et EP1K10TC100-1N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1K10TC100-1 | EP1K10TC100-1N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,80 | $9,20 |
| Series | ACEX 1K | EP1K10 |
| Family | ACEX-1K FPGA family (2.5V) | ACEX-1K |
| Typical Gates | 10,000 | — |
| Logic Elements / Cells | 576 | 576 |
| Embedded Memory (bits) | 12,288 (dual-port SRAM) | — |
| Logic Array Blocks (LABs) | 72 | 72 |
| Embedded Array Blocks (EABs) | Yes (memory / megafunctions) | 3 x 4 Kbit |
| User I/Os | 66 | 66 |
| Maximum Frequency | 250 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS SRAM |
| Core Voltage (VCCINT) | 2.5 V | — |
| Speed Grade | -1 | -1N (commercial, slower tier) |
| Boîtier | 100-pin TQFP | 100-pin TQFP (14 mm x 14 mm, 1 mm height) |
| Type de montage | Surface Mount | Surface Mount (gull-wing) |
| JTAG Support | IEEE Std 1149.1 boundary-scan | Yes (IEEE 1149.1 boundary-scan) |
| Configuration Method | SRAM-based (external config device required) | SRAM (external PROM required) |
| Température de fonctionnement | [DATA_NEEDED: commercial / industrial temp grade] | 0 °C to 70 °C (commercial) |
| Statut RoHS | [DATA_NEEDED] | Compliant |
| Total Gates (typical) | — | 10,000 |
| Embedded RAM Bits | — | 12,288 bits |
| Core Supply Voltage | — | 2.5 V (2.375 V to 2.625 V) |