EP1K10TC100-1N vs EP1K10TC100-1 Comparaison
Comparaison détaillée côte à côte de EP1K10TC100-1N par Intel et EP1K10TC100-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1K10TC100-1N | EP1K10TC100-1 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,20 | $9,80 |
| Family | ACEX-1K | ACEX-1K FPGA family (2.5V) |
| Series | EP1K10 | ACEX 1K |
| Logic Elements / Cells | 576 | 576 |
| Total Gates (typical) | 10,000 | — |
| Embedded RAM Bits | 12,288 bits | — |
| Logic Array Blocks (LABs) | 72 | 72 |
| Embedded Array Blocks (EABs) | 3 x 4 Kbit | Yes (memory / megafunctions) |
| User I/Os | 66 | 66 |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | — |
| Température de fonctionnement | 0 °C to 70 °C (commercial) | [DATA_NEEDED: commercial / industrial temp grade] |
| Process Technology | 0.22 µm CMOS SRAM | 0.22 µm CMOS |
| Boîtier | 100-pin TQFP (14 mm x 14 mm, 1 mm height) | 100-pin TQFP |
| Type de montage | Surface Mount (gull-wing) | Surface Mount |
| Speed Grade | -1N (commercial, slower tier) | -1 |
| Configuration Method | SRAM (external PROM required) | SRAM-based (external config device required) |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | IEEE Std 1149.1 boundary-scan |
| Statut RoHS | Compliant | [DATA_NEEDED] |
| Typical Gates | — | 10,000 |
| Embedded Memory (bits) | — | 12,288 (dual-port SRAM) |
| Maximum Frequency | — | 250 MHz |
| Core Voltage (VCCINT) | — | 2.5 V |