EP1K10TC100-3 vs EP1K10TC100-1N Comparaison
Comparaison détaillée côte à côte de EP1K10TC100-3 par Intel et EP1K10TC100-1N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1K10TC100-3 | EP1K10TC100-1N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,75 | $9,20 |
| Family | ACEX-1K | ACEX-1K |
| Number of Logic Elements (LEs) | 576 | — |
| Typical Gates | 10,000 | — |
| Number of LABs | 72 | — |
| Number of EABs | 3 | — |
| Total RAM Bits | 12,288 | — |
| User I/O Pins | 66 | — |
| Operating Frequency (max) | 200 MHz | — |
| Speed Grade | -3 (fastest commercial) | -1N (commercial, slower tier) |
| Core Voltage | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS SRAM |
| Boîtier | 100-pin TQFP (TQFP-100) | 100-pin TQFP (14 mm x 14 mm, 1 mm height) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature grade] | 0 °C to 70 °C (commercial) |
| Type de montage | Surface Mount | Surface Mount (gull-wing) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI | — |
| Memory Configuration | Dual-port RAM supported (per family) | — |
| Series | — | EP1K10 |
| Logic Elements / Cells | — | 576 |
| Total Gates (typical) | — | 10,000 |
| Embedded RAM Bits | — | 12,288 bits |
| Logic Array Blocks (LABs) | — | 72 |
| Embedded Array Blocks (EABs) | — | 3 x 4 Kbit |
| User I/Os | — | 66 |
| Core Supply Voltage | — | 2.5 V (2.375 V to 2.625 V) |
| Configuration Method | — | SRAM (external PROM required) |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |