EP1K30TC144-3N vs EP1K30TI144-2N Comparaison
Comparaison détaillée côte à côte de EP1K30TC144-3N par Intel et EP1K30TI144-2N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1K30TC144-3N - 30K Gate ACEX-1K FPGA 144-LQFP | Intel / Altera
EP1K30TC144-3N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP1K30TC144-3N | EP1K30TI144-2N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $16,40 | $25,00 |
| Series | ACEX-1K | ACEX-1K |
| Family | ACEX-1K® Field Programmable Gate Array | — |
| Typical Gates | 30,000 | — |
| Logic Elements (LE) | 1,728 | — |
| Logic Array Blocks (LAB) | 216 | — |
| Embedded Array Blocks (EAB) | 6 | — |
| Total RAM Bits | 24,576 | — |
| User I/O Pins | 102 | — |
| Process Technology | 0.22 µm CMOS (SRAM-based) | 0.22 µm CMOS SRAM |
| Core Supply Voltage | 2.5 V | — |
| Maximum Internal Frequency | 200 MHz | — |
| Speed Grade | -3 (slowest tier of ACEX-1K) | -2 |
| Boîtier | 144-pin LQFP (TQFP) 22x22 mm | 144-pin LQFP |
| Type de montage | Surface Mount | Surface Mount |
| Configuration | SRAM, in-system programmable via serial / JTAG | — |
| Statut RoHS | Unknown (legacy part - verify with distributor) | Compliant (per Utmel product note) |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements / Cells | — | 1728 |
| Typical Gate Count | — | 30,000 gates |
| Embedded Memory (RAM bits) | — | 24,576 bits |
| Maximum User I/O | — | 102 |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Number of Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 2.5 V / 3.3 V |
| Operating Temperature Grade | — | Industrial |
| Plage de température de fonctionnement | — | -40 °C to +100 °C ambient |
| Lead Pitch | — | 0.5 mm |
| Configuration Interface | — | JTAG (IEEE 1149.1), serial passive/active |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |