EP1M120F484-I6 vs EP1M120F484 Comparaison
Comparaison détaillée côte à côte de EP1M120F484-I6 par Altera et EP1M120F484 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1M120F484-I6 | EP1M120F484 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $98,50 | $92,00 |
| Family | Mercury FPGA | Mercury (EP1M) |
| Logic Elements (LEs) | 4,800 | — |
| Equivalent Gates | 120,000 | — |
| Logic Array Blocks (LABs) | 480 | — |
| User I/Os | 303 | — |
| High-Speed Transceivers | Up to 12 channels | — |
| Transceiver Data Rate | Up to 1.25 Gbps per channel | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 µm CMOS | CMOS |
| Boîtier | 484-pin FBGA (FineLine BGA) | 484-pin FineLine BGA (FCBGA) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Température de fonctionnement | -40 °C to +100 °C (industrial) | Unknown [DATA_NEEDED: operating temperature range] |
| Speed Grade | -6 | — |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, JTAG, EPC device | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | — |
| Logic Elements / Cells | — | 4,800 |
| Gate Count | — | 120,000 |
| Embedded Memory (Bits) | — | 49,152 |
| User I/O Pins | — | 303 |
| Total Package Pins | — | 484 |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltage | — | 3.3 V / 2.5 V |
| Transceiver Channels | — | Up to 18 channels |
| Max Transceiver Data Rate | — | 1.25 Gbps with CDR |
| Speed Grade (this P/N) | — | Not specified in provided data [DATA_NEEDED: speed grade] |
| Configuration Interface | — | JTAG (IEEE 1149.1) / EPC serial |
| Statut RoHS | — | Unknown [DATA_NEEDED: RoHS status] |