EP1M120F484C5M vs EP1M120F484C6N Comparaison
Comparaison détaillée côte à côte de EP1M120F484C5M par Altera et EP1M120F484C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1M120F484C5M | EP1M120F484C6N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $56,50 |
| Device Type | Field Programmable Gate Array | — |
| Device Family | Mercury | — |
| Product Type | Programmable Logic Device | — |
| Architecture | Look-Up Table based | LUT-based, optimized for high-speed interconnect |
| Process Technology | CMOS | CMOS |
| Tension d'alimentation | 1.8 V | — |
| Logic Capacity | 120K gates | — |
| Logic Cells | 4,800 cells | — |
| Logic Array Blocks | 480 LABs | — |
| User I/O Count | 303 I/O | — |
| Integrated Transceivers | High-speed transceivers | — |
| Clock Data Recovery | 1.25 Gbps | — |
| Boîtier | 484-pin FC-FBGA | 484-ball FC-FBGA (FineLine BGA) |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0C to 85C (commercial) |
| AEC-Q100 Status | [DATA_NEEDED: AEC-Q100 qualification status] | — |
| Family | — | Mercury (APEX PLD platform) |
| Typical Gates | — | 120,000 |
| Logic Cells / Elements | — | 4,800 |
| Logic Array Blocks (LABs) | — | 480 |
| User I/Os | — | 303 |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Transceiver Data Rate | — | Up to 1.25 Gbps with CDR |
| MultiCore Support | — | Yes (hot socketing) |
| Niveau MSL | — | 3 (per JEDEC J-STD-020) |