EP1M120F484I6M vs EP1M120F484C8A Comparaison
Comparaison détaillée côte à côte de EP1M120F484I6M par Altera et EP1M120F484C8A par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1M120F484I6M | EP1M120F484C8A |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $325,00 | $195,00 |
| Family | Mercury (EP1M) | Mercury (EP1M) |
| Logic Elements | 120,000 | — |
| System Gates | 480,000 (typical) | 120,000 |
| LABs / CLBs | 303 | — |
| Flip-Flops | 49,152 | — |
| Embedded Memory (Bits) | 4,800 Kb (480 Kbits) | — |
| Package Type | 484-Ball FCBGA | — |
| Package Code | BGA, 484 balls, Fine-pitch | — |
| Package Shape | Square | — |
| Terminal Form | Ball | — |
| Temperature Grade | Industrial | — |
| Speed Grade | -6 (slowest Mercury timing bin) | -8 (C8) |
| Tension d'alimentation | 1.5 V core / 3.3 V aux (per Mercury datasheet) | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS | — |
| Clock Management | PLLs (per Mercury family) | — |
| Boundary-Scan | IEEE 1149.1 / JTAG | — |
| Statut RoHS | Compliant (M revision) | [DATA_NEEDED: rohs_status] |
| Series | — | EP1M120 |
| Logic Elements / Cells | — | 4,800 |
| Number of LABs/CLBs | — | 480 |
| Total RAM Bits | — | 49,152 |
| Number of User I/Os | — | 303 |
| Number of Transceivers | — | Integrated CDR-capable, up to 1.25 Gbps |
| Core Supply Voltage | — | 1.8 V |
| Boîtier | — | 484-ball FC-FBGA (FineLine BGA) |
| Package Pin Count | — | 484 |
| Température de fonctionnement | — | 0 °C to +85 °C (commercial) |
| Logic Family | — | CMOS |
| Type de montage | — | Surface Mount |
| Process Technology | — | [DATA_NEEDED: process_node] |