EP1S10F484C6N vs EP1S10F484I6N Comparaison
Comparaison détaillée côte à côte de EP1S10F484C6N par Intel et EP1S10F484I6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1S10F484I6N - Stratix 10,570 LEs FPGA 484-FBGA | Intel (Altera)
EP1S10F484I6N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP1S10F484C6N | EP1S10F484I6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $226,31 | $305,20 |
| Family | Stratix | Stratix |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs / CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of User I/O | 335 | — |
| Boîtier | 484-FBGA (23 × 23 mm, 1.0 mm pitch) | 484-ball FBGA (FCBGA), 23 x 23 mm, 1 mm pitch |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Supply Voltage - Operating | 1.425 V to 1.575 V (core 1.5 V) | — |
| Speed Grade | C6 | — |
| Température de fonctionnement | 0 °C to 85 °C (TJ) | 0C to +85C (Industrial) |
| Type de montage | Surface Mount (SMT) | Surface Mount (Flip-Chip BGA) |
| Lead Free | Yes | — |
| Configuration Method | SRAM - volatile (JTAG / passive serial / passive parallel / fast passive parallel) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS | — |
| On-chip Resources | TriMatrix memory (M512, M4K, M-RAM), DSP blocks, PLLs | — |
| Logic Elements | — | 10,570 |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Logic Array Blocks (LABs) | — | 1,057 |
| Embedded Memory (Bits) | — | 920,448 |
| DSP Blocks | — | 48 |
| Maximum User I/O | — | 335 |
| Core Voltage (VCCINT) | — | 1.5 V |
| Number of PLLs | — | 6 |
| Peak Reflow Temperature | — | 245 C |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Active Serial |
| Internal Core Speed | — | up to 450 MHz |
| Statut RoHS | — | [DATA_NEEDED: RoHS status] |
| Logic Family | — | CMOS |
| Terminal Finish | — | Tin-Silver-Copper (SnAgCu) |