EP1S10F484C7N vs EP1S20F484C6N Comparaison
Comparaison détaillée côte à côte de EP1S10F484C7N par Intel et EP1S20F484C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S10F484C7N | EP1S20F484C6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $162,00 | $440,00 |
| Family | Stratix (EP1S) | Stratix |
| Manufacturer | Intel (formerly Altera) | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Logic Elements | 10,570 | 18,460 |
| Logic Array Blocks (LABs) | 1,057 | — |
| Embedded Memory (Total) | 920,448 bits | — |
| Embedded Memory Blocks | TriMatrix (M512/M4K/M-RAM) | — |
| Embedded DSP Blocks | 48 | — |
| Maximum User I/O | 335 | — |
| PLLs | 12 | — |
| Boîtier | 484-ball FineLine BGA (FBGA-484), 23 x 23 mm, 1 mm pitch | 484-Ball FCBGA (23 x 23 mm, 1.0 mm pitch) |
| Speed Grade | C7 (-7) | 6 |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Configuration Methods | JTAG, Passive Serial, Passive Parallel | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirm via Intel product page] |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Embedded Memory | — | 1,669,248 bits |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| User I/O Pins | — | 361 |
| Core Supply Voltage | — | 1.5 V |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O voltage - check datasheet] |
| Température de fonctionnement | — | 0 C to 85 C (Commercial) |
| Maximum Internal Clock | — | 450.05 MHz |
| Configuration Interface | — | JTAG (IEEE 1149.1), Serial/Parallel (AS/PS) - EPC device compatible |
| Type de montage | — | Surface Mount |
| Lead-Free | — | [DATA_NEEDED: confirm] |