EP1S10F780I6N vs EP1S10F484I6N Comparaison
Comparaison détaillée côte à côte de EP1S10F780I6N par Intel et EP1S10F484I6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1S10F484I6N - Stratix 10,570 LEs FPGA 484-FBGA | Intel (Altera)
EP1S10F484I6N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP1S10F780I6N | EP1S10F484I6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $98,75 | $305,20 |
| Family | Stratix | Stratix |
| Logic Elements | 10,570 | 10,570 |
| Logic Array Blocks (LABs) | 1,057 | 1,057 |
| User I/Os | 426 | — |
| Embedded RAM (Total) | 920,448 bits | — |
| M512 Blocks | 94 (32 x 18 bits each) | — |
| M4K Blocks | 60 (128 x 36 bits each) | — |
| M-RAM Blocks | 1 (4 Kbit) | — |
| PLLs | 6 | — |
| Clock Outputs | 16 | — |
| DSP Blocks | 12 | 48 |
| Transceiver Channels | 12 (not populated on I6 speed grade) | — |
| Core Voltage (VCCINT) | 1.5 V | 1.5 V |
| I/O Voltage (VCCIO) | 1.5 V, 1.8 V, 2.5 V, 3.3 V (per bank) | — |
| Process Technology | 0.13 µm CMOS | 130 nm CMOS |
| Température de fonctionnement | -40 °C to +100 °C (industrial) | 0C to +85C (Industrial) |
| Speed Grade | -6 (6.0 ns core clock period) | — |
| Boîtier | 780-ball FineLine BGA, 29 x 29 mm, 1.0 mm pitch | 484-ball FBGA (FCBGA), 23 x 23 mm, 1 mm pitch |
| Type de montage | Surface Mount | Surface Mount (Flip-Chip BGA) |
| Niveau MSL | 3 (168 hours) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Configuration Modes | Active Serial (AS), Passive Serial (PS), JTAG | — |
| Logic Family | CMOS | CMOS |
| Supply Voltage Nominal | 1.5 V | — |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory (Bits) | — | 920,448 |
| Maximum User I/O | — | 335 |
| Number of PLLs | — | 6 |
| Peak Reflow Temperature | — | 245 C |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Active Serial |
| Internal Core Speed | — | up to 450 MHz |
| Terminal Finish | — | Tin-Silver-Copper (SnAgCu) |