EP1S25F1020C5 vs EP1S25F1020C6N Comparaison
Comparaison détaillée côte à côte de EP1S25F1020C5 par Altera et EP1S25F1020C6N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S25F1020C5 | EP1S25F1020C6N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $650,00 | $450,00 |
| Family | Stratix | Stratix |
| Logic Elements | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory | 1,944,576 bits (1.94 Mbits) | — |
| User I/Os | 706 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Maximum Internal Frequency | 500 MHz | — |
| Speed Grade | C5 | — |
| Temperature Grade | Commercial Extended | — |
| Boîtier | 1020-ball FC-FBGA | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) |
| Type de montage | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Number of PLLs | 4 | — |
| DSP Blocks | Yes (dedicated multiply-accumulate) | — |
| Memory Interfaces Supported | DDR SDRAM, FCRAM, QDR SRAM, RLDRAM | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements (LE) | — | 25,660 |
| Logic Cells | — | 25,660 |
| Embedded Memory (bits) | — | 1,944,576 |
| User I/O Pins | — | 706 |
| LABs (Logic Array Blocks) | — | 2,566 |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Température de fonctionnement | — | 0C to +85C (Commercial) |
| Configuration Method | — | JTAG or EPC configuration device |
| Family Generation | — | Stratix (1st generation) |