EP1S30F780I6N vs EP1S25F780I6N Comparaison
Comparaison détaillée côte à côte de EP1S30F780I6N par Intel et EP1S25F780I6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1S30F780I6N - Stratix FPGA, 32.5K LE, 780-BGA | Intel / Altera
EP1S30F780I6N ⚠ Dernier achatIntel
EP1S25F780I6N - Stratix 25,660-LE FPGA, 780-BBGA, Industrial | Altera/Intel
EP1S25F780I6N ObsoleteComparaison des spécifications
| Paramètre | EP1S30F780I6N | EP1S25F780I6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $225,00 | $1 250,00 |
| Family | Stratix | Stratix |
| Logic Elements | 32,470 | 25,660 |
| Total RAM Bits | 3,317,184 bits | 1,944,576 |
| User I/O Count | 597 | — |
| Package Type | 780-BBGA, FCBGA (FineLine BGA) | — |
| Température de fonctionnement | -40C to +100C (Industrial, I6) | 0C to 85C (industrial) |
| Process Technology | 130 nm | 130 nm CMOS |
| Supply Voltage (Core) | [DATA_NEEDED: core voltage] | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| Lead-Free / RoHS | Lead-free terminal finish (N suffix), RoHS-compliant | — |
| Speed Grade | -6 | 6 (I6 - industrial) |
| DSP Blocks | Yes (TriMatrix + DSP blocks per Stratix family) | Yes (dedicated 9/18/36-bit multipliers) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Niveau MSL | 3 (per typical FBGA moisture sensitivity) | 3 (per Partstack listing) |
| JEDEC Code (e1) | e1 (Pb-free / matte tin) | — |
| Logic Array Blocks (LABs) | — | 2,566 |
| User I/O Pins | — | 597 |
| Boîtier | — | 780-BBGA (FineLine BGA, 29 x 29 mm, 1.0 mm pitch) |
| Core Voltage | — | 1.5 V |
| Lead Free | — | Yes (per Ampheo listing) |
| Statut RoHS | — | [DATA_NEEDED: rohs status] |
| Embedded PLL | — | Yes |
| LVDS Support | — | Yes (up to 840 Mbps per Altera datasheet family) |
| Configuration Mode | — | JTAG / Passive Serial / Fast Passive Parallel (per Stratix family) |