EP1S40F780C8N vs EP1S30F780C8N Comparaison
Comparaison détaillée côte à côte de EP1S40F780C8N par Intel et EP1S30F780C8N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1S30F780C8N - Stratix 32470 LEs FPGA, 597 I/O, 780-FBGA | Intel
EP1S30F780C8N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP1S40F780C8N | EP1S30F780C8N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $130,00 | $510,00 |
| Family | Stratix | Stratix |
| Series | EP1S | Stratix (EP1S) |
| Logic Elements | 41,250 | — |
| Embedded Memory | 3,423,744 bits | — |
| Embedded Multipliers | 615 (18-bit x 18-bit) | — |
| Boîtier | 780-ball FCBGA (FineLine BGA), 29 mm x 29 mm, 1 mm pitch | 780-ball FC-FBGA (FineLine BGA), 29 × 29 mm, 1 mm pitch |
| Logic Family | CMOS | — |
| Supply Voltage (Core) | 1.5 V | 1.5 V |
| Speed Grade | C8 (commercial) | C8 (-8, faster bin) |
| Température de fonctionnement | 0 °C to +85 °C | 0 °C to +85 °C (Commercial) |
| I/O Standard Support | LVDS, LVTTL, LVCMOS, SSTL, HSTL, PCI, PCI-X | — |
| Maximum LVDS Data Rate | 840 Mbps | — |
| PLL Blocks | Up to 12 | — |
| Type de mémoire | TriMatrix (MRAM, M512, M4K blocks) | — |
| External Memory Interface | DDR, DDR-II, QDR, SDRAM | — |
| Configuration Method | Passive serial, Fast passive parallel, JTAG | — |
| Design Software | Quartus II | — |
| Statut RoHS | Compliant | Compliant (per distributor listings) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Logic Elements (LEs) | — | 32,470 |
| Embedded Memory (RAM bits) | — | 3,317,184 |
| Total Memory Bits | — | 3,317,184 |
| User I/Os | — | 597 |
| LABs (Logic Array Blocks) | — | 3,247 |
| Process Technology | — | 130 nm CMOS |
| Configuration | — | SRAM-based, JTAG / Passive Serial / Passive Parallel |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |