EP1S60F1020C6N vs EP1S60F1020C6NGB Comparaison
Comparaison détaillée côte à côte de EP1S60F1020C6N par Intel et EP1S60F1020C6NGB par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S60F1020C6N | EP1S60F1020C6NGB |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $195,00 | $171,00 |
| Series | Stratix | — |
| Family | Stratix (EP1S) | Stratix |
| Logic Elements (LEs) | 57,120 | — |
| Logic Cells | 6,570 blocks (per chipdig datasheet summary) | — |
| Embedded RAM (Total Bits) | 5,215,104 bits | — |
| Embedded Multipliers | 773 (18x18) | [DATA_NEEDED: 9-bit equivalent multiplier count] |
| Maximum User I/O Pins | Per datasheet, package-dependent (F1020 variant) | — |
| Package Type | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch | — |
| Logic Family / Process | CMOS, 0.13 µm | — |
| Température de fonctionnement | 0°C to +85°C (Commercial) | 0 °C to 85 °C (commercial) |
| Tension d'alimentation | Per datasheet (Stratix Device Handbook Vol. 1) | — |
| Speed Grade | C6 (mid-tier) | -6 (commercial) |
| Lead-Free / Pb-Free | Yes (suffix 'N') | — |
| Statut RoHS | Compliant (per 'N' suffix) | [DATA_NEEDED] |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Configuration | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins | — |
| PLL Count | 12 (per Stratix family datasheet) | — |
| Memory Block Types | TriMatrix (M512, M4K, M-RAM) | — |
| Logic Elements (LE) | — | 57,120 |
| System Gates | — | ~5,215,104 |
| Maximum User I/O | — | 773 |
| Embedded Memory | — | [DATA_NEEDED: TriMatrix block RAM in Mbits] |
| DSP Blocks | — | 18 |
| PLLs | — | 12 |
| Boîtier | — | 1020-ball FBGA |
| Package Dimensions | — | 33 x 33 mm, 1.0 mm pitch |
| Process Technology | — | 0.13 µm CMOS |
| Supply Voltage Core (VCCINT) | — | [DATA_NEEDED: nominal VCCINT] |
| I/O Standard Support | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Lead-Free | — | [DATA_NEEDED] |