EP1S80B956C5N vs EP1S80B956C6AB Comparaison
Comparaison détaillée côte à côte de EP1S80B956C5N par Intel et EP1S80B956C6AB par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S80B956C5N | EP1S80B956C6AB |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $175,00 | $142,00 |
| Family | Altera Stratix | Stratix |
| Logic Elements | 79,040 | — |
| Maximum Internal Clock Frequency | 500 MHz | — |
| Process Technology | 130 nm CMOS | 130 nm |
| Core Supply Voltage | 1.5 V | — |
| Boîtier | 956-ball FCBGA | 956-ball FCBGA |
| Température de fonctionnement | 0 °C to +85 °C (commercial, 'C' grade) | [DATA_NEEDED: operating temperature range] |
| Speed Grade | 5 | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Memory Architecture | TriMatrix on-chip memory | — |
| DSP Blocks | Yes (dedicated hardware multipliers) | Embedded DSP blocks (per Stratix family) |
| PLLs | Yes (multiple) | Multiple PLLs for clock management |
| I/O Standard Support | LVDS, LVTTL, LVCMOS, SSTL, HSTL (per Stratix family) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements (LEs) | — | 79,040 |
| Logic Cells | — | 79,040 |
| Core Voltage | — | 1.5 V |
| Maximum Operating Frequency | — | 450.05 MHz |
| User I/O Pins | — | 683 |
| Memory Blocks | — | TriMatrix embedded RAM |
| Configuration Method | — | SRAM-based, configured via JTAG or passive/active serial |
| Manufacturer | — | Intel (formerly Altera) |