EP1S80B956C6AB vs EP1S60B956C6 Comparaison
Comparaison détaillée côte à côte de EP1S80B956C6AB par Intel et EP1S60B956C6 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S80B956C6AB | EP1S60B956C6 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,00 | $339,20 |
| Family | Stratix | — |
| Logic Elements (LEs) | 79,040 | — |
| Logic Cells | 79,040 | — |
| Process Technology | 130 nm | — |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 450.05 MHz | — |
| User I/O Pins | 683 | — |
| Boîtier | 956-ball FCBGA | 956-BBGA, FCBGA (40 x 40 mm) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0 C to +85 C (Commercial) |
| Memory Blocks | TriMatrix embedded RAM | — |
| DSP Blocks | Embedded DSP blocks (per Stratix family) | — |
| PLLs | Multiple PLLs for clock management | — |
| Configuration Method | SRAM-based, configured via JTAG or passive/active serial | — |
| Manufacturer | Intel (formerly Altera) | — |
| Series | — | Stratix (EP1S) |
| Logic Elements | — | 57,120 |
| Total RAM Bits | — | 5,215,104 |
| Number of LABs/CLBs | — | 5712 |
| Number of I/O | — | 683 |
| Supplier Device Package | — | 956-BGA (40x40) |
| Core Voltage - Supply | — | 1.425 V to 1.575 V |
| Voltage - Supply | — | 1.425 V to 1.575 V |
| Nombre de broches | — | 956 |
| Form of Terminal | — | Ball (BGA) |
| Package Code | — | BGA / FCBGA |