EP1SGX10DF672C5N vs EP1S25F672C5N Comparaison
Comparaison détaillée côte à côte de EP1SGX10DF672C5N par Intel et EP1S25F672C5N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1SGX10DF672C5N - Stratix GX FPGA, 10,570 Cells, 672-BGA | Intel
EP1SGX10DF672C5N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP1SGX10DF672C5N | EP1S25F672C5N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $192,00 | $142,00 |
| Family | Stratix GX | Stratix |
| Logic Cells | 10,570 | — |
| Logic Array Blocks (LABs) | 1,057 | — |
| Configurable Logic Blocks | 1,200 | — |
| User I/Os | 362 | — |
| On-chip RAM | 920,448 bits | — |
| Supply Voltage (Core, VCCINT) | 1.5 V nominal (1.425 V to 1.575 V) | — |
| Technology | 130 nm CMOS | — |
| Température de fonctionnement | 0 C to 85 C (Commercial) | — |
| Boîtier | 672-ball FC-FBGA (FineLine BGA), 33 x 33 mm, 1.0 mm pitch | — |
| Type de montage | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| Logic Family | CMOS | — |
| Configuration | Passive Serial / Passive Parallel / JTAG / Altera Serial | — |
| Statut RoHS | Compliant (FBGA package) | Compliant |
| High-Speed Transceivers | Embedded GX transceivers (data rate not specified in provided data [DATA_NEEDED: transceiver count and max data rate]) | — |
| Series | — | EP1S25 |
| Logic Elements (Cells) | — | 25,660 |
| Number of CLBs | — | 2,566 |
| Number of Logic Cells / Gates | — | [DATA_NEEDED: total system gates] |
| Process Technology | — | 130 nm CMOS |
| Maximum Internal Frequency | — | 500 MHz |
| Core Supply Voltage | — | 1.5 V (nominal) |
| Number of I/O Pins | — | 473 user I/O |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Package Type | — | FineLine BGA (FBGA) |
| Package Pin Count | — | 672 |
| Ball Pitch | — | 1.00 mm |
| Plage de température de fonctionnement | — | 0 °C to +85 °C (commercial) |
| Speed Grade | — | C5 |
| Lead-Free (Pb-Free) | — | Yes (suffix "N") |
| Configuration Method | — | SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel |