EP1SGX25DF672C7ES vs EP1SGX25DF672C7 Comparaison
Comparaison détaillée côte à côte de EP1SGX25DF672C7ES par Intel et EP1SGX25DF672C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1SGX25DF672C7ES | EP1SGX25DF672C7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $125,40 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | Stratix GX | — |
| Logic Cells | 25,660 cells | — |
| Logic Family | CMOS | — |
| Process Technology | 130 nm | 0.13 µm CMOS, SRAM-based |
| Tension d'alimentation | 1.5 V | — |
| I/O Count | 455 I/O | — |
| Listed Clock Frequency | 4385.97 MHz | — |
| Secondary Listed Maximum Clock | 4.7 MHz | — |
| High-Speed Serial Data Rate | 500 Mbps to 3.1875 Gbps | — |
| High-Speed Serial Direction | Full-duplex | — |
| Available Family Transceiver Configurations | 4, 8, 16, or 20 channels | — |
| Maximum Family Transceiver Bandwidth | 127.5 Gbps full-duplex | — |
| Boîtier | 672-pin FC-FBGA | 672-FBGA (27 × 27 mm, 1.0 mm pitch) |
| Alternate Package Description | FBGA-1020, 33 mm x 33 mm, 1 mm pitch | — |
| Température de fonctionnement | 0 °C to 85 °C | 0 °C to +85 °C (Commercial) |
| Lead-Free Status | Lead-free | — |
| Series | — | Stratix GX |
| Family | — | Stratix GX |
| Logic Elements (LE) | — | 25,660 |
| Logic Array Blocks (LABs) | — | 2,566 |
| Total RAM Bits | — | 1,944,576 |
| User I/O Count | — | 455 |
| Embedded DSP Blocks | — | 14 |
| Embedded Transceivers | — | Yes (GX family) |
| Core Supply Voltage | — | 1.425 V to 1.575 V (1.5 V nominal) |
| Type de montage | — | Surface Mount |
| Lead Free / RoHS | — | Lead-Free, RoHS Compliant |
| Speed Grade | — | C7 (moderate Fmax bin) |
| PLL Count | — | [DATA_NEEDED: PLL count] |