EP1SGX25DF672C7N vs EP1SGX25DF67216 Comparaison
Comparaison détaillée côte à côte de EP1SGX25DF672C7N par Intel et EP1SGX25DF67216 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1SGX25DF672C7N - Stratix GX FPGA 25K LE 672-BGA | Intel / Altera
EP1SGX25DF672C7N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP1SGX25DF672C7N | EP1SGX25DF67216 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $245,00 | $198,00 |
| Series | Stratix GX | — |
| Logic Elements | 25,660 | 25,660 |
| Embedded Memory | 1,944,576 bits | — |
| Maximum User I/O | 455 | — |
| Number of Transceivers | 4 | — |
| Transceiver Data Rate (Max) | 3.125 Gbps | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Process Technology | 130 nm CMOS | — |
| Température de fonctionnement | 0 °C to 85 °C (Commercial) | Industrial, -40C to +100C (I-suffix family) |
| Boîtier | 672-ball FineLine BGA (FBGA-672) | 672-ball FineLine BGA (DF672) |
| Package Dimensions | 33 × 33 mm, 1 mm pitch | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-Free / RoHS | Yes (lead-free, per datasheet) | — |
| Speed Grade | C7 | — |
| Statut RoHS | Compliant | Lead-free / RoHS compliant (per Altera product family documentation) |
| Family | — | Stratix GX |
| Total RAM Bits | — | 1,944,576 |
| Embedded Multipliers (18x18) | — | [DATA_NEEDED: 18x18 multiplier count] |
| Number of PLLs | — | 4 |
| Number of Transceiver Channels | — | 8 (4 in each of 2 banks) |
| Max Transceiver Data Rate | — | 3.1875 Gbps per channel |
| Min Transceiver Data Rate | — | 500 Mbps |
| Auxiliary Supply Voltage | — | 3.3 V |
| I/O Supply Voltage | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) |
| Maximum User I/O Pins | — | [DATA_NEEDED: user I/O count for DF672 package] |
| On-Die Termination | — | Yes, 100-ohm differential |
| Pre-emphasis / Equalization | — | Programmable (transmitter pre-emphasis; receiver adaptive equalization) |
| Configuration Schemes | — | Passive serial, fast passive parallel, JTAG, Altera enhanced configuration |