EP1SGX25FF1020C5ES vs EP1SGX25FF1020C5L Comparaison
Comparaison détaillée côte à côte de EP1SGX25FF1020C5ES par Intel et EP1SGX25FF1020C5L par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1SGX25FF1020C5ES - Stratix GX FPGA 25.66K LE FC-FBGA1020 | Intel
EP1SGX25FF1020C5ES ObsoleteComparaison des spécifications
| Paramètre | EP1SGX25FF1020C5ES | EP1SGX25FF1020C5L |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,00 | $105,00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,660 | 25,660 cells |
| Configurable Logic Blocks (CLBs) | 2,566 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V nominal (1.425 V to 1.575 V) | — |
| Transceiver Channels | Up to 20 | — |
| Transceiver Data Rate | 500 Mbps to 3.1875 Gbps per channel | — |
| Aggregate Serial Bandwidth | 127.5 Gbps full-duplex | — |
| Boîtier | FC-FBGA-1020 (33 × 33 mm, 1.0 mm pitch, lead-free) | — |
| Nombre de broches | 1020 | 1020 balls |
| Logic Family | CMOS | — |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | [DATA_NEEDED: operating temperature range] |
| Speed Grade | C5 (Enhanced) | C5 (slowest tier) |
| Temperature Grade Suffix | ES (Enhanced) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | Compliant (lead-free) | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | Yes | — |
| Package Type | — | FC-FBGA (Flip-Chip Fine-pitch Ball Grid Array) |
| Core Voltage | — | 1.5 V |
| Maximum Transceiver Data Rate | — | 3.125 Gbps |
| Maximum Operating Frequency | — | 5000 MHz (internal reference) |
| Memory Architecture | — | TriMatrix (M512/M4K/M-RAM blocks) |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, HSTL, SSTL |
| Configuration Scheme | — | Active serial (EPCS), passive serial, JTAG |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |