EP1SGX25FF1020C5N vs EP1SGX25FF1020 Comparaison
Comparaison détaillée côte à côte de EP1SGX25FF1020C5N par Intel et EP1SGX25FF1020 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1SGX25FF1020C5N - 25,660 Logic Elements Stratix GX FPGA | Intel
EP1SGX25FF1020C5N ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EP1SGX25FF1020C5N | EP1SGX25FF1020 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 580,00 | $295,00 |
| Series | Stratix GX | — |
| Family | Stratix GX (Stratix I GX) | Stratix GX |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Cells | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| User I/Os | 607 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | -40C to +85C (industrial variant) / 0C to +85C (commercial variant) |
| Package Type | FC-FBGA-1020 (Flip-Chip Fine-pitch BGA) | — |
| Package Size | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| Lead Free | Yes (per datasheet snippet) | — |
| Logic Family | CMOS | — |
| Speed Grade | C5 (approx. 500 MHz internal clock) | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED: confirm RoHS status - datasheet does not state explicitly] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements (LE) | — | 25,660 |
| Configurable Logic Blocks (CLB) | — | 2,566 |
| Embedded Memory (bits) | — | 1,944,576 |
| Logic Cells (per FPGAkey) | — | 25,660 |
| Combinatorial Delay (Tpd) | — | 7.49 ns (per Microchip USA datasheet summary) |
| Operating Frequency (max) | — | [DATA_NEEDED: max internal operating frequency] |
| Boîtier | — | 1020-ball FCBGA (PBGA, 1.00 mm pitch) |
| Pin/Package Count | — | 1020 |
| Tension d'alimentation | — | [DATA_NEEDED: core VCC voltage] |
| Serial Transceivers | — | Embedded SERDES (multi-gigabit, protocol-dependent) |
| DSP Blocks | — | Embedded dedicated multipliers |
| PLL / Clock Management | — | Embedded PLLs |
| Configuration Method | — | SRAM-based, configuration via JTAG / passive serial / fast passive parallel |