EP1SGX25FF1020I6N vs EP1SGX25DF1020I6N Comparaison
Comparaison détaillée côte à côte de EP1SGX25FF1020I6N par Altera et EP1SGX25DF1020I6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1SGX25FF1020I6N | EP1SGX25DF1020I6N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $145,00 | $165,00 |
| Manufacturer | Altera (Intel) | Intel (formerly Altera) |
| Series | Stratix GX | EP1SGX25 |
| Family | Stratix GX FPGA | Stratix GX |
| Logic Elements (LE) | 25,660 | — |
| Number of LABs/CLBs | 2,566 | — |
| Total RAM Bits | 1,944,576 | — |
| User I/O Count | 607 | — |
| Supply Voltage - Core | 1.425 V to 1.575 V | — |
| Température de fonctionnement | -40 °C to +100 °C (Industrial) | 0 °C to +85 °C (industrial) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Boîtier / Format | 1020-BBGA, FCBGA | — |
| Supplier Device Package | 1020-FBGA (33x33) | — |
| Speed Grade | 6 | — |
| Process Node | 0.13 µm | — |
| Embedded Transceivers | Stratix GX multi-gigabit transceivers (MGTs) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Logic Elements | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| User I/Os | — | 607 |
| Maximum Operating Frequency | — | [DATA_NEEDED: max internal clock frequency in MHz] |
| Process Technology | — | 130 nm CMOS |
| Core Supply Voltage | — | 1.425 V to 1.575 V (1.5 V nominal) |
| Multi-Gigabit Transceivers | — | Integrated (up to 3.125 Gbps per channel) |
| Boîtier | — | 1020-ball FC-FBGA, 33 mm × 33 mm, 1.0 mm pitch |
| Lead Finish | — | Lead Free |
| Niveau MSL | — | [DATA_NEEDED: moisture sensitivity level] |
| Memory | — | Embedded TriMatrix memory blocks |
| DSP Blocks | — | Integrated DSP blocks for fixed/floating-point arithmetic |
| Clock Management | — | PLLs with dynamic phase alignment (DPA) |
| Grade Identifier | — | I6 (industrial, speed grade 6) |