EP1SGX40DF1020C7ES vs EP1SGX40DF1020C5ES Comparaison
Comparaison détaillée côte à côte de EP1SGX40DF1020C7ES par Altera et EP1SGX40DF1020C5ES par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP1SGX40DF1020C7ES - Stratix GX FPGA, 41.25K Cells, FBGA-1020 | Altera
EP1SGX40DF1020C7ES Nrnd
Comparaison des spécifications
| Paramètre | EP1SGX40DF1020C7ES | EP1SGX40DF1020C5ES |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 325,00 | $0,00 |
| Family | Stratix GX | — |
| Logic Elements | 41,250 | — |
| Logic Family | CMOS | Stratix GX |
| Process Technology | 130 nm | 130 nm |
| Tension d'alimentation | 1.5 V (core) | 1.5 V |
| Boîtier | FBGA-1020 (33 x 33 mm, 1.0 mm pitch) | — |
| Terminal Form | Ball | Ball |
| Package Shape | Square | — |
| Number of Pins/Terminals | 1020 | — |
| Température de fonctionnement | 0 C to 85 C (32 F to 185 F) | 0 C to 85 C |
| Temperature Grade | Commercial (speed grade C7) | — |
| Type de montage | Surface Mount (BGA) | — |
| Combinatorial Delay | 9.48 ns per CLB | — |
| Fréquence d'horloge maximale | 4385.97 MHz (internal) | — |
| Manufacturer | Altera (now Intel PSG) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Product Type | — | Field-Programmable Gate Array (FPGA) |
| Logic Technology | — | CMOS |
| Logic Cells | — | 41,250 cells |
| Logic Array Blocks | — | 4,125 LABs |
| Configurable I/O Connections | — | 624 input and 624 output connections |
| Reported Maximum Frequency | — | 5,000 MHz |
| Reported Maximum CLB Combinatorial Delay | — | 7.49 ns |
| Alternative Listed Maximum Clock Frequency | — | 6 MHz |
| Terminal Count | — | 1,020 pins |
| Package Type | — | FC-FBGA-1020 |
| Package Dimensions | — | 33 mm x 33 mm |
| Ball Pitch | — | 1 mm |
| Mounting Configuration | — | Surface-mount ball grid array |
| Package Code | — | BGA |
| Configuration Method | — | [DATA_NEEDED: configuration method] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |