EP1SGX40FF1020C5 vs EP1SGX40F1020 Comparaison
Comparaison détaillée côte à côte de EP1SGX40FF1020C5 par Intel et EP1SGX40F1020 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1SGX40FF1020C5 | EP1SGX40F1020 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 245,00 | $102,10 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 41,250 | 41,250 |
| Configurable Logic Blocks (CLBs) | 4,125 | — |
| Total RAM Bits | 3,423,744 bits | 3,423,744 |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Transceiver Channels | 20 (up to 3.125 Gbps) | — |
| Core Voltage | 1.5 V (1.425 V to 1.575 V) | — |
| Température de fonctionnement | 0C to +85C (commercial, -C5 speed grade) | — |
| Boîtier | 1020-ball FCBGA (FF), 1.00 mm pitch, 33 x 33 mm | 1020-BBGA (FineLine BGA) |
| Seated Height | 3.50 mm | — |
| Process Technology | CMOS, 0.13 um | — |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirm from manufacturer page] |
| Embedded Memory Bits | — | 3,423,744 |
| User I/O Pins | — | 624 |
| Number of LABs/CLBs | — | 4125 |
| Number of Transceivers | — | 20 |
| Transceiver Data Rate | — | 600 Mbps to 3.1875 Gbps |
| Plage de température de fonctionnement | — | [DATA_NEEDED: industrial/commercial grade] |
| Tension d'alimentation | — | [DATA_NEEDED: core and I/O voltage] |
| Configuration Mode | — | SRAM-based LUT |
| JTAG Boundary Scan | — | Yes |