EP20K1000CF672C9ES vs EP20K1000CF672C7 Comparaison
Comparaison détaillée côte à côte de EP20K1000CF672C9ES par Intel et EP20K1000CF672C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K1000CF672C9ES | EP20K1000CF672C7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $385,00 | $158,00 |
| Series | APEX 20KC | — |
| Number of Logic Elements/Cells | 38,400 | — |
| System Gates | 1,000,000 | 1,000,000 (typical) |
| Number of LABs/CLBs | 3,840 | — |
| Total RAM Bits | 327,680 | — |
| Number of User I/O | 508 | — |
| Core Supply Voltage | 1.71 V to 1.89 V | 1.8 V |
| Process Technology | 0.15 µm | 0.15 µm all-layer copper CMOS |
| Internal Performance Grade | 250 MHz | — |
| Operating Temperature (TJ) | 0 °C to 85 °C | — |
| Boîtier | 672-FBGA (27 x 27 mm) | 672-ball FC-FBGA (45 × 45 mm, 1.27 mm pitch) |
| Type de montage | Surface Mount | Surface Mount |
| Supplier Device Package | 672-FBGA | — |
| Niveau MSL | [DATA_NEEDED: MSL Level] | [DATA_NEEDED: moisture sensitivity level] |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - part predates common RoHS reporting] |
| Lead-Free | [DATA_NEEDED: Lead-free status] | — |
| Family | — | APEX 20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements / Cells | — | 38400 |
| Maximum Internal Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.6 ns (typical) |
| User I/O Count | — | 488 (some sources list 508) |
| Température de fonctionnement | — | 0 °C to +85 °C (commercial, C suffix) |
| Speed Grade | — | C7 (fastest) |
| Embedded Memory (EAB) | — | Embedded array blocks (RAM/CAM/ROM) |
| PLL Count | — | 4 |
| Configuration Interface | — | Passive Serial, JTAG (IEEE 1149.1), Fast Passive Parallel |