EP20K1000CF672I8 vs EP20K1000CF672C8 Comparaison
Comparaison détaillée côte à côte de EP20K1000CF672I8 par Intel et EP20K1000CF672C8 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K1000CF672I8 | EP20K1000CF672C8 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $165,00 | $245,09 |
| Family | APEX 20KC | — |
| Manufacturer | Intel (formerly Altera) | — |
| Process Technology | 0.15 µm CMOS | 0.15 um all-layer copper CMOS |
| System Gates | 1,000,000 | 1,000,000 |
| Logic Elements / Cells | 38,400 | 38,400 |
| Boîtier | 672-pin FC-FBGA (FineLine BGA) | 672-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch |
| Ball Pitch | 1.00 mm | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| User I/O Count | 508 | — |
| Dedicated Inputs | 4 | — |
| Internal Frequency (max) | 301.21 MHz | — |
| Pin-to-Pin Logic Delay | 8 ns | — |
| Température de fonctionnement | -40 °C to +85 °C (industrial, I suffix) | 0C to 85C (commercial) |
| Type de mémoire | SRAM-based (volatile) | — |
| Embedded Memory | Embedded Array Blocks (EABs) for dual-port RAM / FIFO | — |
| PLL Count | 4 | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown (legacy part, verify on lot) |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Series | — | APEX 20KC |
| Embedded RAM | — | 327,680 bits |
| User I/Os | — | 488 (datasheet), 508 (per some distributor listings) |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Number of Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Number of PLLs | — | 4 |
| Maximum User I/O Pins | — | 488 |
| Core Voltage (VCCINT) | — | 1.8 V (typical) |
| I/O Voltage (VCCIO) | — | Multi-voltage (LVTTL/LVCMOS/LVDS/SSTL/GTL+ compatible) |
| Propagation Delay (typical) | — | 1.6 ns |
| Configuration Mode | — | FPP / Passive Serial / JTAG |