EP20K1000EBI652-2 vs EP20K1500EBC652-1X Comparaison
Comparaison détaillée côte à côte de EP20K1000EBI652-2 par Altera et EP20K1500EBC652-1X par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K1000EBI652-2 - APEX 20KE 1M Gates FPGA, BGA-652 | Intel / Altera
EP20K1000EBI652-2 ObsoleteAltera
EP20K1500EBC652-1X - APEX 20KE 1.5M Gates FPGA | Altera | BGA-652
EP20K1500EBC652-1X ObsoleteComparaison des spécifications
| Paramètre | EP20K1000EBI652-2 | EP20K1500EBC652-1X |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $105,00 | $175,00 |
| Device Family | APEX 20KE | — |
| Logic Elements | 38,400 | — |
| Typical Gates | 1,000,000 | — |
| Maximum User I/O | 488 | — |
| Boîtier | BGA-652 (FineLine BGA, 45 x 45 mm) | 652-ball BGA (FCBGA / PBGA652) |
| Ball Pitch | 1.27 mm | — |
| Speed Grade | -2 | — |
| Plage de température de fonctionnement | Industrial -40C to +100C | — |
| Supply Voltage (Core) | 1.8 V | — |
| Process Technology | 0.18 micrometer CMOS, all-layer copper | 0.22 µm CMOS |
| Embedded System Block Memory | [DATA_NEEDED: ESB memory size] | — |
| Embedded Multiplier/Accumulator Blocks | [DATA_NEEDED: number of multiplier blocks] | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Propagation Delay | 1.6 ns | 1.84 ns |
| Internal Operating Frequency | 350 MHz | — |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Niveau MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Family | — | APEX 20KE |
| Logic Elements / Cells | — | 51840 |
| System Gates | — | 1.5 M |
| Macros | — | 3456 |
| Total RAM Bits | — | 442368 |
| User I/O | — | 488 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Internal Frequency | — | 160 MHz (per digchip) / 400 MHz (per fpgakey) |
| Core Voltage | — | 1.8 V |
| Température de fonctionnement | — | 0 °C to +85 °C (commercial) |
| Configuration Method | — | JTAG / SRAM |
| Architecture | — | MultiCore (LUT + product-term) |