EP20K100CQ208C9 vs EP20K100CQ208C8 Comparaison
Comparaison détaillée côte à côte de EP20K100CQ208C9 par Intel et EP20K100CQ208C8 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100CQ208C9 | EP20K100CQ208C8 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $25,10 | $13,40 |
| Series | APEX 20K | APEX 20KE |
| Family Name | APEX 20K | — |
| Number of Logic Elements | 4,160 | — |
| Typical Gates | 100,000 | 100,000 |
| Maximum User I/O | 159 | — |
| Total RAM Bits | 53,248 | — |
| Number of PLLs | 4 | 4 |
| Embedded System Blocks (ESBs) | 26 | — |
| Boîtier | 208-pin PowerQuad QFP (PQFP-208) | 208-PQFP (28x28 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0 C to +70 C | 0C to +85C (Commercial) |
| Speed Grade | C9 | C8 |
| Process Technology | 0.18 micron CMOS SRAM | — |
| Supply Voltage (Core) | 1.8 V typical | — |
| Configuration Interface | Passive Serial, JTAG (IEEE 1149.1) | — |
| Programming Method | SRAM-based, in-system programmable | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Logic Elements | — | 4,160 |
| Maximum System Gates | — | 263,000 |
| Embedded System Block (ESB) Bits | — | 53,248 |
| Dedicated RAM Bits | — | 100,000 |
| User I/O Pins | — | 208 |
| Supply Voltage Core | — | 1.8 V |
| I/O Standard Support | — | 1.8V / 2.5V / 3.3V / 5.0V LVTTL/LVCMOS, 3.3V PCI |
| Configuration Modes | — | Passive Serial, Passive Parallel Synchronous, Passive Parallel Asynchronous, Boundary-Scan JTAG |