EP20K100EBC652-2X vs EP20K300EBC652-1 Comparaison
Comparaison détaillée côte à côte de EP20K100EBC652-2X par Altera et EP20K300EBC652-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K300EBC652-1 - APEX 20KE 300K Gates FPGA, 652-BGA | Altera
EP20K300EBC652-1 ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K100EBC652-2X | EP20K300EBC652-1 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $85,00 | $215,00 |
| Family | APEX 20KE | APEX 20KE |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Logic Elements | 4,160 | — |
| Embedded System Blocks (ESBs) | 26 | — |
| Maximum RAM Bits | 53,248 | — |
| Maximum User I/O Pins | 246 | — |
| Supply Voltage - Core | 1.8 V | — |
| Supply Voltage - I/O | 1.8 V / 2.5 V / 3.3 V | — |
| Boîtier | 652-ball BGA (EBC652) | — |
| Speed Grade | -2 (faster commercial) | — |
| Process Technology | 0.18 µm CMOS, SRAM-based | 0.22 µm CMOS |
| Température de fonctionnement | 0C to +85C (commercial) | 0C to +85C (industrial range varies) |
| Type de montage | Surface Mount | Surface Mount |
| Configuration Method | Passive Serial / Passive Parallel / JTAG (EPC) | — |
| Clock Resources | Up to 4 DLLs, multiple global clocks | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Series | — | APEX-20KE® |
| Number of Logic Elements / Cells | — | 11520 |
| Total RAM Bits | — | 147456 |
| Number of Gates | — | 300000 |
| Number of I/O | — | 408 |
| Voltage - Supply | — | 1.71 V to 1.89 V |
| Boîtier / Format | — | 652-BGA (45x45 mm) |
| Supplier Device Package | — | 652-BGA |
| Core Operating Frequency (max) | — | [DATA_NEEDED: confirm from datasheet typical perf] |
| LVDS Support | — | Yes (per APEX 20KE family specification) |
| In-System Programmable | — | Yes (JTAG via ByteBlasterMV/MasterBlaster) |