EP20K100EQC208-1X vs EP20K100CQ208C7 Comparaison
Comparaison détaillée côte à côte de EP20K100EQC208-1X par Intel et EP20K100CQ208C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100EQC208-1X | EP20K100CQ208C7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $152,00 | $22,40 |
| Family | APEX-20KE | APEX20K |
| Logic Elements | 4,160 | 4,160 |
| Typical Gate Count | 100,000 gates | — |
| Embedded Memory (bits) | 53,248 | — |
| Embedded System Blocks (ESBs) | 26 | — |
| Maximum User I/O | 151 | — |
| Boîtier | 208-pin PQFP (EQC208) | 208-pin PQFP (QFP) |
| Process Technology | 0.15 micrometer CMOS, all-layer copper | SRAM-based CMOS |
| Propagation Delay | 1.6 ns | — |
| Speed Grade | -1 (standard) | C7 (7 ns pin-to-pin delay) |
| Température de fonctionnement | 0C to +85C | — |
| Core Supply Voltage | 1.8 V | — |
| MultiVolt I/O Support | 1.8V / 2.5V / 3.3V / 5.0V | — |
| PLLs | 4 | — |
| Configuration Interface | JTAG (IEEE 1149.1), passive serial/parallel | — |
| Niveau MSL | 3 (168 Hours) | [DATA_NEEDED: moisture sensitivity level] |
| Statut RoHS | Lead-free (Pb-free), RoHS compliant | [DATA_NEEDED: rohs status not in verified data] |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Embedded RAM Bits | — | 53,248 |
| User I/O Pins | — | 159 |
| Temperature Grade | — | Commercial (0C to +85C) |
| Core Voltage | — | 1.8 V |
| I/O Voltage | — | 3.3 V (LVTTL/LVCMOS/PCI compatible) |
| Configuration Method | — | SRAM - volatile, requires boot PROM |
| Type de montage | — | Surface Mount (PQFP with gull-wing leads) |
| Statut du cycle de vie | — | Obsolete - last-time-buy phase ended |