EP20K100FC324-2V vs EP20K100FC324-3 Comparaison
Comparaison détaillée côte à côte de EP20K100FC324-2V par Altera et EP20K100FC324-3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K100FC324-2V - APEX 20K 100K Gates FPGA, 324-FBGA | Altera
EP20K100FC324-2V ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K100FC324-2V | EP20K100FC324-3 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,15 | $42,10 |
| Family | APEX 20K | APEX 20K (non-KE) |
| Logic Elements / Gates | 100,000 gates | — |
| Macrocells | 416 | — |
| Total RAM Bits | 53,248 bits | — |
| Number of Logic Elements / Cells | 4,160 | — |
| Number of I/O | 252 | — |
| Number of Dedicated Inputs | 4 | — |
| Maximum Frequency | 167 MHz | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | 2.5 V |
| I/O Standard Support | LVDS, 1.8 V | — |
| Process Technology | 0.22 micrometer CMOS | 0.22 µm CMOS |
| Boîtier | 324-FBGA (19x19 mm, 1.0 mm pitch) | 324-pin FBGA (Fine-pitch BGA) |
| Supplier Device Package | 324-FBGA | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Température de fonctionnement | [DATA_NEEDED: operating temperature grade] | 0 °C to 85 °C (Commercial) |
| Series | APEX-20K | APEX 20K |
| Manufacturer | Altera (now Intel FPGA) | — |
| System Gates | — | 100,000 |
| Logic Elements | — | 4,160 |
| Maximum Logic Blocks | — | 26 |
| Embedded Memory (RAM bits) | — | 53,248 |
| User I/O Pins | — | 252 |
| Total RAM bits | — | 53,248 |
| Maximum Internal Frequency | — | 167 MHz |
| Propagation Delay | — | 1.6 ns |
| Speed Grade | — | -3 (slowest) |
| Package Body Size | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |