EP20K160EQC240-1X vs EP20K160EQC240-2 Comparaison
Comparaison détaillée côte à côte de EP20K160EQC240-1X par Intel et EP20K160EQC240-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K160EQC240-1X | EP20K160EQC240-2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $110,00 | $108,50 |
| Family | APEX 20KE | APEX 20KE |
| Logic Elements / Cells | 6,400 | — |
| System Gates | 160,000 | — |
| Embedded Memory (ESB) | [DATA_NEEDED: ESB RAM bits] | — |
| Maximum Internal Frequency | 373 MHz | — |
| Propagation Delay | 1.55 ns | 1.55 ns |
| User I/Os | 175 (some sources list 271 for BGA variant) | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.22 µm CMOS | 0.18-micron SRAM CMOS |
| Boîtier | 240-pin PQFP (FQFP) | PQFP-240 (QFP-240, FQFP) |
| Logic Family | CMOS | CMOS |
| Speed Grade | -1X (slowest commercial) | -2 |
| Température de fonctionnement | 0 °C to +85 °C | 0 C to 85 C (Commercial) |
| Type de montage | Surface Mount | Surface Mount (Gull Wing) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Non-compliant (original Altera-era PQFP) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Typical Gates | — | 160,000 |
| Logic Elements (LEs) | — | 6,400 |
| Embedded System Blocks (ESBs) | — | 64 |
| Maximum Embedded Memory | — | 56 Kbits (approx. 7 Kbytes usable) |
| Maximum User I/O (this package) | — | 175 |
| Maximum User I/O (largest package) | — | 271 |
| PLLs | — | 4 |
| Internal Frequency (max) | — | 160 MHz |
| Nombre de broches | — | 240 |
| Supply Voltage (core) | — | [DATA_NEEDED: core VCC value] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, GTL+, LVDS |
| Configuration Modes | — | Passive Serial, Passive Parallel Synchronous, JTAG |
| JTAG Support | — | IEEE Std. 1149.1 boundary-scan |
| MultiCore Architecture | — | Yes (Logic + ESB + I/O) |
| 5.0 V Tolerance | — | Achievable with external resistor |