EP20K200BC484-1X vs EP20K200CF484C7N Comparaison
Comparaison détaillée côte à côte de EP20K200BC484-1X par Altera et EP20K200CF484C7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K200BC484-1X - APEX-20K 200K-Gate FPGA 382 I/O 484-BGA | Altera
EP20K200BC484-1X ObsoleteAltera
EP20K200CF484C7N - APEX-20K 200K Gates FPGA 484-FBGA | Intel/Altera
EP20K200CF484C7N ObsoleteComparaison des spécifications
| Paramètre | EP20K200BC484-1X | EP20K200CF484C7N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $75,10 | $62,00 |
| Product Family | APEX-20K | — |
| Series | EP20K200 | APEX-20K |
| Logic Elements / Cells | 8320 | 8,320 |
| Total RAM Bits | 106496 | 106,496 |
| Number of I/O | 382 | 382 |
| Number of Logic Gates | 200000 | — |
| Package Type | 484-BBGA (Fine-pitch Ball Grid Array) | — |
| Package Suffix | BC484 | — |
| Speed Grade | -1 (slowest commercial grade) | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0C to +85C (commercial, [DATA_NEEDED: full Tjj range]) | 0C to +85C (commercial grade) |
| Configuration Method | SRAM - external serial/parallel PROM | SRAM-based, in-system reconfigurable |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| PLL | ClockLock / ClockBoost | — |
| Embedded Memory Blocks | Embedded System Blocks (ESBs) - RAM/ROM/CAM | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Number of Gates (typical) | — | 200,000 |
| Voltage - Supply (VCCINT) | — | 1.71 V to 1.89 V |
| Boîtier / Format | — | 484-BBGA (FineLine BGA) |
| Supplier Device Package | — | 484-FBGA (23x23 mm) |
| Number of PLLs | — | 4 |
| Embedded Array Blocks (EABs) | — | Configurable as RAM/ROM/FIFO |
| Programmable Logic Blocks | — | APEX LAB architecture |
| MultiVolt I/O Support | — | 1.8V / 2.5V / 3.3V / 5V |
| Statut du cycle de vie | — | Obsolete (Altera/Intel APEX-20K family EOL) |