EP20K200CF484C8N vs EP20K200CB356C8N Comparaison
Comparaison détaillée côte à côte de EP20K200CF484C8N par Intel et EP20K200CB356C8N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K200CF484C8N | EP20K200CB356C8N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $102,95 | $56,40 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements (LEs) | 8,320 | — |
| System Gates | 200,000 | 200,000 |
| Embedded System Memory (Bits) | 106,496 | — |
| Maximum Operating Frequency | 301.21 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt) | — |
| Boîtier | 484-ball FBGA (FineLine BGA) | 356-ball LBGA |
| Speed Grade | -8 | — |
| Operating Temperature (Commercial) | 0 °C to +85 °C | — |
| Lead-Free / Pb-Free | Yes (suffix 'N') | — |
| Number of I/O Pins | [DATA_NEEDED: max user I/O count for FBGA-484 package] | — |
| Configuration Method | JTAG / Serial / Passive Parallel | — |
| Embedded Memory Type | True dual-port / single-port RAM (ESB) | — |
| PLL Count | [DATA_NEEDED: PLL count for EP20K200 family] | — |
| Type de montage | Surface Mount (BGA) | — |
| Statut RoHS | Compliant (Pb-free suffix) | [DATA_NEEDED: RoHS compliance] |
| Series | — | EP20K200 |
| Device Type | — | SRAM-based LUT FPGA |
| Logic Elements (Cells) | — | 8,320 |
| Maximum Internal Frequency | — | 301.21 MHz |
| Propagation Delay (tpd) | — | 1.78 ns |
| Nominal Core Supply Voltage | — | 1.8 V |
| Core Supply Voltage Range | — | 1.71 V to 1.89 V |
| Number of User I/O Pins | — | 263 |
| Number of Dedicated Inputs | — | 4 |
| Total Macrocells / Output Functions | — | 263 |
| Embedded Memory Bits | — | 106,496 bits |
| Number of PLLs | — | 4 |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Differential Signaling | — | LVDS |
| Configuration Interface | — | Serial / JTAG (IEEE 1149.1) |
| Operating Temperature (commercial "C") | — | 0 C to +85 C (TJ) |
| Terminal Finish ("N") | — | Lead-free / Pb-free |
| Niveau de sensibilité à l'humidité (MSL) | — | [DATA_NEEDED: MSL rating] |