EP20K200CF484C9N vs EP20K200CF484C7N Comparaison
Comparaison détaillée côte à côte de EP20K200CF484C9N par Altera et EP20K200CF484C7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K200CF484C7N - APEX-20K 200K Gates FPGA 484-FBGA | Intel/Altera
EP20K200CF484C7N ObsoleteComparaison des spécifications
| Paramètre | EP20K200CF484C9N | EP20K200CF484C7N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $201,04 | $62,00 |
| Family | APEX 20KC | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| Typical Gates | 200,000 | — |
| Logic Elements | 8,320 | — |
| Embedded System Block (ESB) Bits | 106,496 | — |
| Maximum User I/O | 376 | — |
| Fréquence d'horloge maximale | 250 MHz | — |
| Process Technology | 0.15 um CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) | — |
| Boîtier | 484-pin FineLine BGA (FBGA) | — |
| Speed Grade | C9 (250 MHz) | — |
| Temperature Grade | Industrial (0C to +85C) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Configuration Scheme | SRAM-based, supports passive serial/parallel and JTAG | — |
| Niveau MSL | 3 (per JEDEC J-STD-020) | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Series | — | APEX-20K |
| Logic Elements / Cells | — | 8,320 |
| Total RAM Bits | — | 106,496 |
| Number of Gates (typical) | — | 200,000 |
| Number of I/O | — | 382 |
| Voltage - Supply (VCCINT) | — | 1.71 V to 1.89 V |
| Boîtier / Format | — | 484-BBGA (FineLine BGA) |
| Supplier Device Package | — | 484-FBGA (23x23 mm) |
| Température de fonctionnement | — | 0C to +85C (commercial grade) |
| Number of PLLs | — | 4 |
| Embedded Array Blocks (EABs) | — | Configurable as RAM/ROM/FIFO |
| Programmable Logic Blocks | — | APEX LAB architecture |
| MultiVolt I/O Support | — | 1.8V / 2.5V / 3.3V / 5V |
| Configuration Method | — | SRAM-based, in-system reconfigurable |
| Statut du cycle de vie | — | Obsolete (Altera/Intel APEX-20K family EOL) |