EP20K200EBC652-3N vs EP20K200EBC652-2X Comparaison
Comparaison détaillée côte à côte de EP20K200EBC652-3N par Altera et EP20K200EBC652-2X par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K200EBC652-3N | EP20K200EBC652-2X |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $220,00 | $195,00 |
| Series | APEX 20KE (APEX-20KE®) | APEX-20KE® |
| Device Family | EP20K200 | — |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | — |
| Logic Array Blocks (LABs) | 832 | — |
| Macrocells | 832 | — |
| Embedded RAM | 106,496 bits | — |
| User I/Os (DigiKey listing) | 376 | — |
| User I/Os (digchip listing) | 277 | — |
| Propagation Delay | 2.33 ns | — |
| Internal Frequency (max) | 189 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.18 um CMOS |
| Core Supply Voltage | 1.71 V to 1.89 V (nominal 1.8 V) | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Supply (LVDS-capable) | LVDS, 2.5 V referenced (per source variant) | — |
| Boîtier | 652-ball BGA | 652-BGA |
| Type de montage | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 °C to 85 °C (commercial) | 0C to +85C |
| Speed Grade | -3 (slowest in APEX 20KE family) | — |
| Configuration | JTAG (IEEE 1149.1), Passive Serial | — |
| Statut RoHS | Compliant | — |
| Family | — | APEX-20KE |
| Device Logic Elements | — | 8,320 |
| Number of LABs/CLBs | — | 832 |
| Total RAM Bits | — | 106,496 |
| Number of I/O Pins | — | 376 |
| Number of Gates | — | 200,000 (typical) |
| I/O Standard Support | — | LVTTL, LVCMOS, LVDS, PCI, GTL+, SSTL |
| Configuration Method | — | Serial or Parallel PROM, JTAG (IEEE 1149.1) |
| Lead-Free / RoHS | — | Compliant (per DigiKey listing) |