EP20K200EFC484-2X vs EP20K200FC484-2X Comparaison
Comparaison détaillée côte à côte de EP20K200EFC484-2X par Intel et EP20K200FC484-2X par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K200FC484-2X - 200K Gates APEX 20K FPGA, 484-FBGA | Intel / Altera
EP20K200FC484-2X ObsoleteComparaison des spécifications
| Paramètre | EP20K200EFC484-2X | EP20K200FC484-2X |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $54,40 | $95,00 |
| Family | APEX-20KE | APEX 20K |
| Logic Elements | 8,320 | — |
| LABs/CLBs | 832 | — |
| Total RAM Bits | 106,496 | — |
| Gate Count | 200,000 | — |
| User I/O Pins | 376 | — |
| Max Operating Frequency | 205 MHz | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V (multi-standard) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Boîtier | 484-FBGA (23x23 mm) | 484-pin FBGA (FineLine BGA), 1.0 mm pitch |
| Package Code | BGA, Ball, Square | — |
| Propagation Delay | 2.5 ns | 3.0 ns |
| Température de fonctionnement | 0 °C to 85 °C | 0 °C to 85 °C (commercial) |
| Speed Grade | -2X | -2 (with LVDS support, "X" suffix) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Series | — | EP20K200 |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Maximum Logic Elements | — | 8,320 cells |
| Typical System Gates | — | 200,000 |
| Embedded Memory (EAB) | — | 106,496 bits |
| Maximum User I/O | — | 382 |
| Number of Logic Elements | — | 8,320 |
| Maximum Internal Frequency | — | 200 MHz |
| Core Supply Voltage | — | 2.5 V |
| Type de montage | — | Surface Mount |
| Programmable I/O Standards | — | 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS |
| JTAG Support | — | IEEE 1149.1 Boundary-Scan |