EP20K200FC484-1 vs EP20K200EFC484-2N Comparaison
Comparaison détaillée côte à côte de EP20K200FC484-1 par Altera et EP20K200EFC484-2N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K200FC484-1 | EP20K200EFC484-2N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $119,00 | $175,00 |
| Family | APEX 20K | APEX-20KE |
| Logic Elements / Cells | 8320 | — |
| System Gates | 200 K | 200,000 |
| Embedded Memory (RAM bits) | 106,496 bits | — |
| Number of I/Os | 382 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Core Supply Voltage | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Maximum Operating Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | — |
| Température de fonctionnement | 0 °C to 85 °C (Commercial) | 0 °C to +85 °C (Commercial) |
| Boîtier | 484-ball FBGA (FineLine BGA) | 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Speed Grade | -1 (fastest bin) | -2 |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Product Type | — | FPGA - Field Programmable Gate Array |
| Logic Elements | — | 8,320 |
| Total RAM Bits | — | 106,496 |
| Embedded System Blocks (ESB) | — | 52 (True Dual-Port RAM) |
| Maximum User I/O | — | 376 |
| Core Voltage | — | 1.8 V |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Logic Family | — | CMOS |
| Propagation Delay (typ.) | — | 2.5 ns |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, JTAG |
| PLLs | — | 4 |